The invention relates generally to semiconductor device fabrication and, in particular, to device structures for a varactor diode, methods of forming device structures for a varactor diode, and design structures for an integrated circuit containing device structures for a varactor diode.
A voltage-controlled varactor diode is a variable capacitor device having the form of a p-n junction diode and designed to take advantage of the variation of capacitance. Varactor diodes are found in many complementary metal-oxide-semiconductor (CMOS) integrated circuits in circuit designs for certain applications, such as radiofrequency (RF) communications and RF wireless applications. Varactor diodes are particularly useful as active elements in parametric circuits, such as oscillation circuits like voltage-controlled oscillators, in which the capacitance tunability of the varactor diode is advantageously used to tune the circuit's oscillation frequency.
Devices fabricated using silicon-on-insulator (SOI) technologies provide certain performance improvements, such as lower parasitic junction capacitance, increased latchup resistance, and reduced power consumption at equivalent performance, in comparison with comparable devices built directly in a bulk silicon substrate. Generally, an SOI substrate includes a thin SOI layer of semiconductor material (e.g., single crystal silicon) partitioned by isolation regions to define discrete electrically-isolated regions for building device structures and a thin buried layer of an insulator, such as a buried oxide (SiO2) layer, physically separating and electrically isolating the SOI layer from a handle wafer. To remedy floating body problems suffered by SOI technologies, methods are being sought to effectively thin the SOI layer to a thickness that provides full depletion of the channel region for field effect transistors under typical gate electrode voltages.
Vertical junction diodes are typically implemented in bulk CMOS technologies. However, diodes with vertical junction architectures are incompatible with advancing SOI technologies because of the scaling of the SOI layer to progressively narrower thicknesses and contact between shallow trench isolation regions and the buried insulating layer of the SOI substrate. This design deficiency prevents the use of the standard cathode contact strategies applicable in bulk CMOS technologies for use in fabricating varactor diodes in SOI technologies. Therefore, this design deficiency prevents the implementation of vertical diode structures in advanced SOI technologies as the SOI layer becomes thinner.
While conventional vertical device structures for varactor diodes have been effective for bulk technologies, advanced device structures for varactor diodes are needed for compatibility with SOI technologies, as well as fabrication methods for these device structures and design structures for integrated circuits including these device structures.